00001 /** ============================================================================ 00002 * @file archdefs.h 00003 * 00004 * @path $(DSPLINK)/gpp/inc/usr/ 00005 * 00006 * @brief Defines platform specific attributes for user applications. 00007 * 00008 * @ver 1.65.00.03 00009 * ============================================================================ 00010 * @copyright Copyright (C) 2002-2009, Texas Instruments Incorporated - 00011 * http://www.ti.com/ 00012 * 00013 * Redistribution and use in source and binary forms, with or without 00014 * modification, are permitted provided that the following conditions 00015 * are met: 00016 * 00017 * * Redistributions of source code must retain the above copyright 00018 * notice, this list of conditions and the following disclaimer. 00019 * 00020 * * Redistributions in binary form must reproduce the above copyright 00021 * notice, this list of conditions and the following disclaimer in the 00022 * documentation and/or other materials provided with the distribution. 00023 * 00024 * * Neither the name of Texas Instruments Incorporated nor the names of 00025 * its contributors may be used to endorse or promote products derived 00026 * from this software without specific prior written permission. 00027 * 00028 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00029 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 00030 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 00031 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 00032 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 00033 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 00034 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 00035 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 00036 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 00037 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 00038 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00039 * ============================================================================ 00040 */ 00041 00042 00043 #if !defined (ARCHDEFS_H) 00044 #define ARCHDEFS_H 00045 00046 00047 /* ----------------------------------- DSP/BIOS Link */ 00048 #include <gpptypes.h> 00049 00050 00051 #if defined (__cplusplus) 00052 extern "C" { 00053 #endif /* defined (__cplusplus) */ 00054 00055 00056 /** ============================================================================ 00057 * @const SHMEM_INTERFACE 00058 * 00059 * @brief Interface number for shared memory interface. 00060 * ============================================================================ 00061 */ 00062 #define SHMEM_INTERFACE 0 00063 00064 /** ============================================================================ 00065 * @const PCI_INTERFACE 00066 * 00067 * @brief Interface number for PCI interface. 00068 * ============================================================================ 00069 */ 00070 #define PCI_INTERFACE 1 00071 00072 /** ============================================================================ 00073 * @const VLYNQ_INTERFACE 00074 * 00075 * @brief Interface number for VLYNQ interface. 00076 * ============================================================================ 00077 */ 00078 #define VLYNQ_INTERFACE 2 00079 00080 /** ============================================================================ 00081 * @const DSP_MAUSIZE 00082 * 00083 * @brief Size of the DSP MAU (in bytes). 00084 * ============================================================================ 00085 */ 00086 #define DSP_MAUSIZE 1 00087 00088 /** ============================================================================ 00089 * @const DSPLINK_BUF_ALIGN 00090 * 00091 * @brief Alignment of message buffers allocated for transfer. 00092 * ============================================================================ 00093 */ 00094 #define DSPLINK_BUF_ALIGN 128 00095 00096 /** ============================================================================ 00097 * @const ADD_PADDING 00098 * 00099 * @brief Macro to add padding to a structure. 00100 * ============================================================================ 00101 */ 00102 #define ADD_PADDING(padVar, count) Uint16 padVar [count] ; 00103 00104 /** ============================================================================ 00105 * @const DSPLINK_ALIGN 00106 * 00107 * @brief Macro to align a number. 00108 * x: The number to be aligned 00109 * y: The value that the number should be aligned to. 00110 * ============================================================================ 00111 */ 00112 #define DSPLINK_ALIGN(x, y) (Uint32)((Uint32)((x + y - 1) / y) * y) 00113 00114 #if defined (MSGQ_COMPONENT) 00115 /** ============================================================================ 00116 * @const PCPYMQT_CTRLMSG_SIZE 00117 * 00118 * @brief This constant defines the size (in bytes) of control messages used 00119 * within the PCPY MQT. 00120 * ============================================================================ 00121 */ 00122 #define PCPYMQT_CTRLMSG_SIZE 128 00123 00124 /** ============================================================================ 00125 * @const ZCPYMQT_CTRLMSG_SIZE 00126 * 00127 * @brief This constant defines the size (in bytes) of control messages used 00128 * within the ZCPY MQT. 00129 * ============================================================================ 00130 */ 00131 #define ZCPYMQT_CTRLMSG_SIZE 128 00132 00133 /** ============================================================================ 00134 * @const DCPYMQT_CTRLMSG_SIZE 00135 * 00136 * @brief This constant defines the size (in bytes) of control messages used 00137 * within the DZCPY MQT. 00138 * ============================================================================ 00139 */ 00140 #define DCPYMQT_CTRLMSG_SIZE 128 00141 #endif /* if defined (MSGQ_COMPONENT) */ 00142 00143 /** ============================================================================ 00144 * @macro REG 00145 * 00146 * @brief Gives the value of a 32-bit register. 00147 * ============================================================================ 00148 */ 00149 #define REG(x) *((volatile Uint32 *) (x)) 00150 00151 /** ============================================================================ 00152 * @macro RTC_REG_VALUE 00153 * 00154 * @brief Gives the value of a 32-bit register. 00155 * ============================================================================ 00156 */ 00157 #define RTC_REG_VALUE(x) *((volatile Uint32 *) (x)) 00158 00159 /** ============================================================================ 00160 * @const CACHE_L2_LINESIZE 00161 * 00162 * @brief Line size of DSP L2 cache (in bytes). 00163 * ============================================================================ 00164 */ 00165 #define CACHE_L2_LINESIZE 128 00166 00167 /** ============================================================================ 00168 * @const DSPLINK_16BIT_PADDING 00169 * 00170 * @brief Padding required for alignment of a 16-bit value (for L2 cache) 00171 * in 16-bit words. 00172 * ============================================================================ 00173 */ 00174 #define DSPLINK_16BIT_PADDING ((CACHE_L2_LINESIZE - sizeof (Uint16)) / 2) 00175 00176 /** ============================================================================ 00177 * @const DSPLINK_32BIT_PADDING 00178 * 00179 * @brief Padding required for alignment of a 32-bit value (for L2 cache) 00180 * in 16-bit words. 00181 * ============================================================================ 00182 */ 00183 #define DSPLINK_32BIT_PADDING ((CACHE_L2_LINESIZE - sizeof (Uint32)) / 2) 00184 00185 /** ============================================================================ 00186 * @const DSPLINK_BOOL_PADDING 00187 * 00188 * @brief Padding required for alignment of a Boolean value (for L2 cache) 00189 * in 16-bit words. 00190 * ============================================================================ 00191 */ 00192 #define DSPLINK_BOOL_PADDING ((CACHE_L2_LINESIZE - sizeof (Bool)) / 2) 00193 00194 /** ============================================================================ 00195 * @const DSPLINK_PTR_PADDING 00196 * 00197 * @brief Padding required for alignment of a pointer value (for L2 cache) 00198 * in 16-bit words. 00199 * ============================================================================ 00200 */ 00201 #define DSPLINK_PTR_PADDING ((CACHE_L2_LINESIZE - sizeof (Void *)) / 2) 00202 00203 /** ============================================================================ 00204 * @const LDRV_DRV_PADDING 00205 * 00206 * @brief Padding required for DSP L2 cache line alignment within LDRV_DRV 00207 * control structure. 00208 * ============================================================================ 00209 */ 00210 #define LDRV_DRV_CTRL_SIZE ( (sizeof (Uint32) * 23) \ 00211 + (sizeof (Char8) * DSP_MAX_STRLEN) \ 00212 + (sizeof (Uint32) * 4)) 00213 00214 #define LDRV_DRV_PADDING (( DSPLINK_ALIGN (LDRV_DRV_CTRL_SIZE, \ 00215 DSPLINK_BUF_ALIGN) \ 00216 - LDRV_DRV_CTRL_SIZE) / 2) 00217 00218 /** ============================================================================ 00219 * @const LDRV_IPS_CTRL_PADDING 00220 * 00221 * @brief Padding length for the IPS shared configuration structure. 00222 * ============================================================================ 00223 */ 00224 #define LDRV_IPS_CTRL_PADDING ( (CACHE_L2_LINESIZE \ 00225 - ( sizeof (Uint32) \ 00226 + (sizeof (Uint32) * 6))) / 2) 00227 00228 /* ============================================================================ 00229 * @const IPS_EVENT_ENTRY_PADDING 00230 * 00231 * @brief Padding length for IPS event entry. 00232 * ============================================================================ 00233 */ 00234 #define IPS_EVENT_ENTRY_PADDING ( (CACHE_L2_LINESIZE \ 00235 - (((sizeof (Uint32)) * 3))) / 2) 00236 00237 /** ============================================================================ 00238 * @const IPS_CTRL_PADDING 00239 * 00240 * @brief Padding length for the IPS control structure. 00241 * ============================================================================ 00242 */ 00243 #define IPS_CTRL_PADDING ( (CACHE_L2_LINESIZE \ 00244 - (sizeof (Void *) * 6)) / 2) 00245 00246 #if defined (POOL_COMPONENT) 00247 /** ============================================================================ 00248 * @const LDRV_POOL_CTRL_PADDING 00249 * 00250 * @brief Padding length for the POOL shared configuration structure. 00251 * ============================================================================ 00252 */ 00253 #define LDRV_POOL_CTRL_PADDING ( (CACHE_L2_LINESIZE \ 00254 - ( sizeof (Uint32) \ 00255 + (sizeof (Uint32) * 5))) / 2) 00256 #endif /* if defined (POOL_COMPONENT) */ 00257 00258 #if defined (MSGQ_COMPONENT) 00259 /** ============================================================================ 00260 * @const LDRV_MQT_CTRL_PADDING 00261 * 00262 * @brief Padding length for the MQT shared configuration structure. 00263 * ============================================================================ 00264 */ 00265 #define LDRV_MQT_CTRL_PADDING ( (CACHE_L2_LINESIZE \ 00266 - ( sizeof (Uint32) \ 00267 + (sizeof (Uint32) * 5))) / 2) 00268 #endif /* if defined (MSGQ_COMPONENT) */ 00269 00270 #if defined (CHNL_COMPONENT) 00271 /** ============================================================================ 00272 * @const LDRV_DATA_CTRL_PADDING 00273 * 00274 * @brief Padding length for the Data driver shared configuration structure. 00275 * ============================================================================ 00276 */ 00277 #define LDRV_DATA_CTRL_PADDING ( (CACHE_L2_LINESIZE \ 00278 - ( sizeof (Uint32) \ 00279 + (sizeof (Uint32) * 9))) / 2) 00280 #endif /* if defined (CHNL_COMPONENT) */ 00281 00282 #if defined (MPCS_COMPONENT) 00283 /** ============================================================================ 00284 * @const MPCSOBJ_PROC_PADDING 00285 * 00286 * @brief Padding required for alignment of MPCS object for a processor (for 00287 * L2 cache) in 16-bit words. 00288 * ============================================================================ 00289 */ 00290 #define MPCSOBJ_PROC_PADDING ((CACHE_L2_LINESIZE - sizeof (MPCS_ProcObj)) / 2) 00291 00292 /** ============================================================================ 00293 * @const MPCS_CTRL_PADDING 00294 * 00295 * @brief Padding length for MPCS control region. 00296 * ============================================================================ 00297 */ 00298 #define MPCS_CTRL_PADDING (( CACHE_L2_LINESIZE \ 00299 - ( (sizeof (Uint32) * 5) \ 00300 + (sizeof (Void *)))) / 2) 00301 00302 /** ============================================================================ 00303 * @const MPCS_ENTRY_PADDING 00304 * 00305 * @brief Padding length for MPCS_Entry. 00306 * ============================================================================ 00307 */ 00308 #define MPCS_ENTRY_PADDING (( CACHE_L2_LINESIZE \ 00309 - ( (sizeof (Pvoid)) \ 00310 + (DSP_MAX_STRLEN * sizeof (Char8)) \ 00311 + (sizeof (Uint16) * 2))) / 2) 00312 00313 /** ============================================================================ 00314 * @const MPCS_TURN_PADDING 00315 * 00316 * @brief Padding length for MPCS turn member. 00317 * ============================================================================ 00318 */ 00319 #define MPCS_TURN_PADDING (( CACHE_L2_LINESIZE - (sizeof (Uint16))) /2) 00320 #endif /* if defined (MPCS_COMPONENT) */ 00321 00322 #if defined (RINGIO_COMPONENT) 00323 /** ============================================================================ 00324 * @const RINGIO_ENTRY_PADDING 00325 * 00326 * @brief Padding length for RingIO_Entry. 00327 * ============================================================================ 00328 */ 00329 #define RINGIO_ENTRY_PADDING (( CACHE_L2_LINESIZE \ 00330 - ( (RINGIO_NAME_MAX_LEN *sizeof (Char8)) \ 00331 + (sizeof (Pvoid) * 2) \ 00332 + (sizeof (Uint16) * 5))) / 2) 00333 00334 /** ============================================================================ 00335 * @const RINGIO_CTRL_PADDING 00336 * 00337 * @brief Padding length for RINGIO control region. 00338 * ============================================================================ 00339 */ 00340 #define RINGIO_CTRL_PADDING (( CACHE_L2_LINESIZE \ 00341 - ( (sizeof (Uint32) * 5) \ 00342 + (sizeof (Void *)))) / 2) 00343 00344 /** ============================================================================ 00345 * @const RINGIO_CLIENT_PADDING 00346 * 00347 * @brief Padding length for Client structure. 00348 * ============================================================================ 00349 */ 00350 #define RINGIO_CLIENT_PADDING (( CACHE_L2_LINESIZE \ 00351 - ( (sizeof (RingIO_BufPtr) * 2) \ 00352 + (sizeof (Uint32) * 11) \ 00353 + sizeof (RingIO_NotifyFunc) \ 00354 + sizeof (RingIO_NotifyParam) \ 00355 + sizeof (RingIO_ControlStruct *) \ 00356 + sizeof (Void *) \ 00357 + sizeof (Uint16))) / 2) 00358 00359 /** ============================================================================ 00360 * @const RINGIO_CONTROLSTRUCT_PADDING 00361 * 00362 * @brief Padding length for control structure. 00363 * ============================================================================ 00364 */ 00365 #define RINGIO_CONTROLSTRUCT_PADDING (( CACHE_L2_LINESIZE \ 00366 - ( (sizeof (Uint32) * 14) \ 00367 + sizeof (Int32) \ 00368 + (sizeof (RingIO_BufPtr)* 2) \ 00369 + sizeof (Void *))) /2) 00370 #endif /* if defined (RINGIO_COMPONENT) */ 00371 00372 #if defined (MPLIST_COMPONENT) 00373 /** ============================================================================ 00374 * @const MPLIST_ENTRY_PADDING 00375 * 00376 * @brief Padding length for MPLIST_Entry. 00377 * ============================================================================ 00378 */ 00379 #define MPLIST_ENTRY_PADDING (( CACHE_L2_LINESIZE \ 00380 - ( (DSP_MAX_STRLEN * sizeof (Char8)) \ 00381 + (sizeof (Pvoid)) \ 00382 + (sizeof (Uint16) * 2))) / 2) \ 00383 00384 /** ============================================================================ 00385 * @const MPLIST_CTRL_PADDING 00386 * 00387 * @brief Padding length for MPLIST control region. 00388 * ============================================================================ 00389 */ 00390 #define MPLIST_CTRL_PADDING (( CACHE_L2_LINESIZE \ 00391 - ( (sizeof (Uint32) * 5) \ 00392 + (sizeof (Void *)))) / 2) 00393 00394 /** ============================================================================ 00395 * @const MPLIST_LIST_PADDING 00396 * 00397 * @brief Padding length for MPLIST_List. 00398 * ============================================================================ 00399 */ 00400 #define MPLIST_LIST_PADDING (( CACHE_L2_LINESIZE \ 00401 - (sizeof (Void *) * 2)) / 2) 00402 #endif /* if defined (MPLIST_COMPONENT) */ 00403 00404 #if defined (__cplusplus) 00405 } 00406 #endif /* defined (__cplusplus) */ 00407 00408 00409 #endif /* if !defined (ARCHDEFS_H) */