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33 /*!
34 * ======== ti.sdo.ce.video2.IVIDDEC2 ========
35 * IVIDDEC2-compliant video decoder interface
36 *
37 * All IVIDDEC2-compliant video decoder modules must implement this
38 * interface.
39 */
40 metaonly interface IVIDDEC2 inherits ti.sdo.ce.ICodec
41 {
42 override config String serverFxns = "VIDDEC2_SKEL";
43 override config String stubFxns = "VIDDEC2_STUBS";
44
45 override readonly config Int rpcProtocolVersion = 0;
46
47 override readonly config Bool codecClassConfigurable = true;
48
49 /*!
50 * ======== manageInBufsCache =======
51 * Codec Class configuration param
52 *
53 * Determines whether cache will be managed on the DSP for each of the
54 * (up to 16) input buffers given to the codec's "process()" call.
55 *
56 * If this flag is set to "false" for one or more
57 * elements, the cache for the corresponding input buffer will not be
58 * invalidated before the process() call. Skipping unnecessary cache
59 * invalidation improves performance, especially if a buffer is large.
60 *
61 * (If element "i" in this array is set to true, cache for inBufs[i] will
62 * be invalidated only if the buffer is supplied, of course.)
63 *
64 * For example, if you know that a particular codec of this class always
65 * reads the data from its inBufs[1] buffer only via DMA, you can set
66 * manageInBufsCache[1] = false;
67 */
68 config Bool manageInBufsCache[ 16 ] = [
69 true, true, true, true, true, true, true, true,
70 true, true, true, true, true, true, true, true,
71 ];
72
73 /*!
74 * ======== manageOutBufsCache =======
75 * Codec Class configuration param
76 *
77 * Determines whether cache will be managed on the DSP for each of the
78 * (up to 16) output buffers given to the codec's "process()" call.
79 *
80 * If this flag is set to "false" for one or more
81 * elements, the cache for the corresponding output buffer will not be
82 * invalidated before the process() call.
83 * Skipping unnecessary cache invalidation improves
84 * performance. Whether the buffer will be written back after the process()
85 * call depends on the algorithm and cannot be controlled here.
86 *
87 * For example, if you know that a particular codec of this class always
88 * writes the data to its outBufs[2] buffer only via DMA, you can set
89 * manageOutBufsCache[2] = false;
90 */
91 config Bool manageOutBufsCache[ 16 ] = [
92 true, true, true, true, true, true, true, true,
93 true, true, true, true, true, true, true, true,
94 ];
95 }
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