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33 /*!
34 * ======== ti.sdo.ce.video2split.IVIDDEC2BACK ========
35 * Video decode split algorithm (BACK) configuration interface for xDM
36 * IVIDDEC2BACK interface.
37 *
38 * All split video decoder codecs which implement IVIDDEC2BACK must
39 * implement this meta-only configuration interface.
40 */
41 metaonly interface IVIDDEC2BACK inherits ti.sdo.ce.ICodec
42 {
43 override config String serverFxns = "VIDDEC2BACK_SKEL";
44 override config String stubFxns = "VIDDEC2BACK_STUBS";
45
46 override readonly config Int rpcProtocolVersion = 0;
47 override readonly config Bool codecClassConfigurable = true;
48
49 const Int XDM_MAX_CONTEXT_BUFFERS = 32;
50
51 /*!
52 * ======== manageInBufsCache =======
53 * Codec Class configuration param
54 *
55 * Determines whether cache will be managed on the DSP for each of the
56 * (up to 16) input buffers given to the codec's "process()" call.
57 *
58 * If this flag is set to "false" for one or more
59 * elements, the cache for the corresponding input buffer will not be
60 * invalidated before the process() call. Skipping unnecessary cache
61 * invalidation improves performance, especially if a buffer is large.
62 *
63 * (If element "i" in this array is set to true, cache for inBufs[i] will
64 * be invalidated only if the buffer is supplied, of course.)
65 *
66 * For example, if you know that a particular codec of this class always
67 * reads the data from its inBufs[1] buffer only via DMA, you can set
68 * manageInBufsCache[1] = false;
69 */
70 config Bool manageInBufsCache[ XDM_MAX_CONTEXT_BUFFERS ] = [
71 true, true, true, true, true, true, true, true,
72 true, true, true, true, true, true, true, true,
73 true, true, true, true, true, true, true, true,
74 true, true, true, true, true, true, true, true,
75 ];
76
77 /*!
78 * ======== manageOutBufsCache =======
79 * Codec Class configuration param
80 *
81 * Determines whether cache will be managed on the DSP for each of the
82 * (up to 16) output buffers given to the codec's "process()" call.
83 *
84 * If this flag is set to "false" for one or more
85 * elements, the cache for the corresponding output buffer will not be
86 * invalidated before the process() call.
87 * Skipping unnecessary cache invalidation improves
88 * performance. Whether the buffer will be written back after the process()
89 * call depends on the algorithm and cannot be controlled here.
90 *
91 * For example, if you know that a particular codec of this class always
92 * writes the data to its outBufs[2] buffer only via DMA, you can set
93 * manageOutBufsCache[2] = false;
94 */
95 config Bool manageOutBufsCache[ XDM_MAX_CONTEXT_BUFFERS ] = [
96 true, true, true, true, true, true, true, true,
97 true, true, true, true, true, true, true, true,
98 true, true, true, true, true, true, true, true,
99 true, true, true, true, true, true, true, true,
100 ];
101
102 /*!
103 * ======== manageIntermediateBufsCache =======
104 * Codec Class configuration param
105 *
106 * Determines whether cache will be managed on the DSP for each of the
107 * (up to 16) output buffers given to the codec's "process()" call.
108 *
109 * If this flag is set to "false" for one or more
110 * elements, the cache for the corresponding intermediate buffer won't be
111 * invalidated before the process() call.
112 * Skipping unnecessary cache invalidation improves
113 * performance. Whether the buffer will be written back after the process()
114 * call depends on the algorithm and cannot be controlled here.
115 */
116 config Bool manageIntermediateBufsCache[ XDM_MAX_CONTEXT_BUFFERS ] = [
117 true, true, true, true, true, true, true, true,
118 true, true, true, true, true, true, true, true,
119 true, true, true, true, true, true, true, true,
120 true, true, true, true, true, true, true, true,
121 ];
122 }
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